![DPAD2 TO-72 4L](https://image.chipnets.com/thumb/225360/DPAD2-TO-72-4L.jpg) |
DPAD2 TO-72 4L
Linear Integrated Systems, Inc.
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LOW LEAKAGE, MONOLITHIC DUAL, PI |
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|
![SSTDPAD100 SOIC 8L](https://image.chipnets.com/thumb/225518/SSTDPAD100-SOIC-8L.jpg) |
SSTDPAD100 SOIC 8L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD5 TO-72 4L](https://image.chipnets.com/thumb/225362/DPAD5-TO-72-4L.jpg) |
DPAD5 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD1 TO-72 4L](https://image.chipnets.com/thumb/225356/DPAD1-TO-72-4L.jpg) |
DPAD1 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD100 TO-72 4L](https://image.chipnets.com/thumb/225359/DPAD100-TO-72-4L.jpg) |
DPAD100 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD10 TO-72 4L](https://image.chipnets.com/thumb/225358/DPAD10-TO-72-4L.jpg) |
DPAD10 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![SSTDPAD5 SOIC 8L](https://image.chipnets.com/thumb/225519/SSTDPAD5-SOIC-8L.jpg) |
SSTDPAD5 SOIC 8L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD20 TO-72 4L](https://image.chipnets.com/thumb/225361/DPAD20-TO-72-4L.jpg) |
DPAD20 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD1 TO-78 5L](https://image.chipnets.com/thumb/225357/DPAD1-TO-78-5L.jpg) |
DPAD1 TO-78 5L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|
![DPAD50 TO-72 4L](https://image.chipnets.com/thumb/225363/DPAD50-TO-72-4L.jpg) |
DPAD50 TO-72 4L
Linear Integrated Systems, Inc.
|
LOW LEAKAGE, MONOLITHIC DUAL, PI |
|
|